1. Field of the Invention
The disclosed technology relates to semiconductor devices generally, and relates more in particular to transistors having a strained quantum well for carrier confinement, and a method for manufacturing thereof.
2. Description of the Related Technology
Performance enhancement of FinFETs and planar FET devices can be achieved using a number of approaches. One approach includes replacing the traditional channel material (Si) with another material to create a heterostructure. Another approach includes inducing stress in the channel to enhance carrier mobility.
However, some of these approaches can have drawbacks, such as increased junction leakage and deteriorated short-channel effects.